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TitleComplete digital design: a comprehensive guide to digital electronics and computer system architecture
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Table of Contents
                            COMPLETE 
DIGITAL DESIGN
	COMPLETE 
DIGITAL DESIGN
		Copyright
		CONTENTS
		PREFACE
		ACKNOWLEDGMENTS
		ABOUT THE AUTHOR
	PART 1 Digital Fundamentals
		Chapter 1 Digital Logic
			1.1 BOOLEAN LOGIC
			1.2 BOOLEAN MANIPULATION
			1.3 THE KARNAUGH MAP
			1.4 BINARY AND HEXADECIMAL NUMBERING
			1.5 BINARY ADDITION
			1.6 SUBTRACTION AND NEGATIVE NUMBERS
			1.7 MULTIPLICATION AND DIVISION
			1.8FLIP- FLOPS AND LATCHES
			1.9 SYNCHRONOUS LOGIC
			1.10 SYNCHRONOUS TIMING ANALYSIS
			1.11 CLOCK SKEW
			1.12 CLOCK JITTER
			1.13 DERIVED LOGICAL BUILDING BLOCKS
		Chapter 2 Integrated Circuits and the 7400 Logic Families
			2.1 THE INTEGRATED CIRCUIT
			2.2 IC PACKAGING
			2.3 THE 7400- SERIES DISCRETE LOGIC FAMILY
			2.4 APPLYING THE 7400 FAMILY TO LOGIC DESIGN
			2.5 SYNCHRONOUS LOGIC DESIGN WITH THE 7400 FAMILY
			2.6 COMMON VARIANTS OF THE 7400 FAMILY
			2.7 INTERPRETING A DIGITAL IC DATA SHEET
		Chapter 3 Basic Computer Architecture
			3.1 THE DIGITAL COMPUTER
			3.2 MICROPROCESSOR INTERNALS
			3.3 SUBROUTINES AND THE STACK
			3.4 RESET AND INTERRUPTS
			3.5 IMPLEMENTATION OF AN EIGHT- BIT COMPUTER
			3.6 ADDRESS BANKING
			3.7 DIRECT MEMORY ACCESS
			3.8EXTENDING THE MICROPROCESSOR BUS
			3.9 ASSEMBLY LANGUAGE AND ADDRESSING MODES
		Chapter 4 Memory
			4.1 MEMORY CLASSIFICATIONS
			4.2 EPROM
			4.3 FLASH MEMORY
			4.4 EEPROM
			4.5 ASYNCHRONOUS SRAM
			4.6 ASYNCHRONOUS DRAM
			4.7 MULTIPORT MEMORY
			4.8THE FIFO
		Chapter 5 Serial Communications
			5.1 SERIAL VS. PARALLEL COMMUNICATION
			5.2 THE UART
			5.3 ASCII DATA REPRESENTATION
			5.4 RS- 232
			5.5 RS- 422
			5.6 MODEMS AND BAUD RATE
			5.7 NETWORK TOPOLOGIES
			5.8NETWORK DATA FORMATS
			5.9 RS- 485
			5.10 A SIMPLE RS- 485 NETWORK
			5.11 INTERCHIP SERIAL COMMUNICATIONS
		Chapter 6 Instructive Microprocessors and Microcomputer Elements
			6.1 EVOLUTION
			6.2 MOTOROLA 6800 EIGHT- BIT MICROPROCESSOR FAMILY
			6.3 INTEL 8051 MICROCONTROLLER FAMILY
			6.4 MICROCHIP PIC MICROCONTROLLER FAMILY
			6.5 INTEL 8086 16- BIT MICROPROCESSOR FAMILY
			6.6 MOTOROLA 68000 16/ 32- BIT MICROPROCESSOR FAMILY
	PART 2 Advanced Digital Systems
		Chapter 7 Advanced Microprocessor Concepts
			7.1 RISC AND CISC
			7.2 CACHE STRUCTURES
			7.3 CACHES IN PRACTICE
			7.4 VIRTUAL MEMORY AND THE MMU
			7.5 SUPERPIPELINED AND SUPERSCALAR ARCHITECTURES
			7.6 FLOATING- POINT ARITHMETIC
			7.7 DIGITAL SIGNAL PROCESSORS
			7.8PERFORMANCE METRICS
		Chapter 8 High-Performance Memory Technologies
			8.1 SYNCHRONOUS DRAM
			8.2 DOUBLE DATA RATE SDRAM
			8.3 SYNCHRONOUS SRAM
			8.4 DDR AND QDR SRAM
			8.5 CONTENT ADDRESSABLE MEMORY
		Chapter 9 Networking
			9.1 PROTOCOL LAYERS ONE AND TWO
			9.2 PROTOCOL LAYERS THREE AND FOUR
			9.3 PHYSICAL MEDIA
			9.4 CHANNEL CODING
			9.5 8B10B CODING
			9.6 ERROR DETECTION
			9.7 CHECKSUM
			9.8CYCLIC REDUNDANCY CHECK
			9.9 ETHERNET
		Chapter 10 Logic Design and Finite State Machines
			10.1 HARDWARE DESCRIPTION LANGUAGES
			10.2 CPU SUPPORT LOGIC
			10.3 CLOCK DOMAIN CROSSING
			10.4 FINITE STATE MACHINES
			10.5 FSM BUS CONTROL
			10.6 FSM OPTIMIZATION
			10.7 PIPELINING
		Chapter 11 Programmable Logic Devices
			11.1 CUSTOM AND PROGRAMMABLE LOGIC
			11.2 GALS AND PALS
			11.3 CPLDS
			11.4 FPGAS
	PART 3 Analog Basics for Digital Systems
		Chapter 12 Electrical Fundamentals
			12.1 BASIC CIRCUITS
			12.2 LOOP AND NODE ANALYSIS
			12.3 RESISTANCE COMBINATION
			12.4 CAPACITORS
			12.5 CAPACITORS AS AC ELEMENTS
			12.6 INDUCTORS
			12.7 NONIDEAL RLC MODELS
			12.8FREQUENCY DOMAIN ANALYSIS
			12.9 LOWPASS AND HIGHPASS FILTERS
			12.10 BANDPASS AND BAND- REJECT FILTERS
			12.11 TRANSFORMERS
		Chapter 13 Diodes and Transistors
			13.1 DIODES
			13.2 POWER CIRCUITS WITH DIODES
			13.3 DIODES IN DIGITAL APPLICATIONS
			13.4 BIPOLAR JUNCTION TRANSISTORS
			13.5 DIGITAL AMPLIFICATION WITH THE BJT
			13.6 LOGIC FUNCTIONS WITH THE BJT
			13.7 FIELD- EFFECT TRANSISTORS
			13.8POWER FETS AND JFET S
		Chapter 14 Operational Amplifiers
			14.1 THE IDEAL OP- AMP
			14.2 CHARACTERISTICS OF REAL OP- AMPS
			14.3 BANDWIDTH LIMITATIONS
			14.4 INPUT RESISTANCE
			14.5 SUMMATION AMPLIFIER CIRCUITS
			14.6 ACTIVE FILTERS
			14.7 COMPARATORS AND HYSTERESIS
		Chapter 15 Analog Interfaces for Digital Systems
			15.1 CONVERSION BETWEEN ANALOG AND DIGITAL DOMAINS
			15.2 SAMPLING RATE AND ALIASING
			15.3 ADC CIRCUITS
			15.4 DAC CIRCUITS
			15.5 FILTERS IN DATA CONVERSION SYSTEMS
	PART 4 Digital System Design in Practice
		Chapter 16 Clock Distribution
			16.1 CRYSTAL OSCILLATORS AND CERAMIC RESONATORS
			16.2 LOW- SKEW CLOCK BUFFERS
			16.3 ZERO- DELAY BUFFERS: THE PLL
			16.4 FREQUENCY SYNTHESIS
			16.5 DELAY- LOCKED LOOPS
			16.6 SOURCE- SYNCHRONOUS CLOCKING
		Chapter 17 Voltage Regulation and Power Distribution
			17.1 VOLTAGE REGULATION BASICS
			17.2 THERMAL ANALYSIS
			17.3 ZENER DIODES AND SHUNT REGULATORS
			17.4 TRANSISTORS AND DISCRETE SERIES REGULATORS
			17.5 LINEAR REGULATORS
			17.6 SWITCHING REGULATORS
			17.7 POWER DISTRIBUTION
			17.8ELECTRICAL INTEGRITY
		Chapter 18 Signal Integrity
			18.1 TRANSMISSION LINES
			18.2 TERMINATION
			18.3 CROSSTALK
			18.4 ELECTROMAGNETIC INTERFERENCE
			18.5 GROUNDING AND ELECTROMAGNETIC COMPATIBILITY
			18.6 ELECTROSTATIC DISCHARGE
		Chapter 19 Designing for Success
			19.1 PRACTICAL TECHNOLOGIES
			19.2 PRINTED CIRCUIT BOARDS
			19.3 MANUALLY WIRED CIRCUITS
			19.4 MICROPROCESSOR RESET
			19.5 DESIGN FOR DEBUG
			19.6 BOUNDARY SCAN
			19.7 DIAGNOSTIC SOFTWARE
			19.8SCHEMATIC CAPTURE AND SPICE
			19.9 TEST EQUIPMENT
		Appendix A Further Education
	INDEX
                        

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